[E-BOOK] Compilation Techniques for Reconfigurable Architectures






 | #1176638 in Books |  Springer |  2008-10-20 | Original language:English | PDF # 1 |  7.99 x.54 x5.00l,1.05 | File Name: 0387096701 | 223 pages

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||3 of 4 people found the following review helpful.| So much to say|By wiredweird|... and so few pages to say it!

Let's start by identifying the successful reader. If you can draw a clear, crisp line between hardware and software, then you're not that reader. Instead, you have passing knowledge of VHDL or Verilog, you know what SSA means in compiler-speak, and your first thought about a compiler is the intermediate tr|From the Back Cover||This book describes a wide range of code transformations and mapping techniques for compiling programs written in high-level programming languages to reconfigurable architectures. While many of these transformations and mapping techniques h

The extreme ?exibility of recon?gurable architectures and their performance pot- tial have made them a vehicle of choice in a wide range of computing domains, from rapid circuit prototyping to high-performance computing. The increasing availab- ity of transistors on a die has allowed the emergence of recon?gurable architectures with a large number of computing resources and interconnection topologies. To - ploit the potential of these recon?gurable architectures, progra...


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